Smbus & sopc\qsys
What is the simplest way to implement SMBUS communication to a NIOS using the SOPC\Qsys ? Are there any standard components ?
View Articleerror 10170 expecting identifier ,;
i got the following errors for the code i developed Error (10170): Verilog HDL syntax error at arbiter_for_8_clients.v(59) near text "("; expecting an identifier Error (10170): Verilog HDL syntax error...
View ArticleMIPI UVC for Windows
This is a cry for help. We are a start-up company that needs help with hardware. Here's what we have: - An OmniVision sensor (OV9714) - An Altera board that reads the signals off of that sensor - A...
View Articlecyclone II decompression rbf
Does exists description how of decompressing (or compressing) algoritm wich is used in CYCLONE II with EPCS1 (active configuration)? I spent all day but searching, I found altera's patents but it...
View ArticleSet_input_delay misunderstanding
Hello: new to sdc constrains I have 2 cases to constrain my serial data coming in and trying to understand the differences Case 1 has been done in previous projects right or wrong but shows no timing...
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Stratix IV Development Kit (DK-DEV-4SGX230N) - PCIe 2.x 128-bit Avalon-ST...
I have implemented a PCIe 2.x 128-bit Avalon-ST endpoint on the Stratix IV Development Kit. I have so far been able to read the configuration space of the device; however, I have been unable to...
View ArticleuClinux: I need help in implementing sound (ALSA, i2c-ocores, wm8731)
Hello everyone! (At first sorry for my English) Currently I'm doing small project, which is to run all peripherals on the de2-115 board. Successfully I ran most of the components...
View ArticleReed-Solomon decoder parameters
Hi team - Perhaps someone who has experience with the Reed-Solomon decoder core can nudge me in the right direction? I am using the reed_solomon 12.0 decoder core in DSP Builder/Simulink (2012a). The...
View ArticleBooting linux with ECC enabled on SoCkit
I have a SoCkit board and I am interested in booting linux with ECC on SDRAM. How do I set up the memory to be configured with ECC enabled. Do I need special u-boot and spl for this?
View ArticleDifference Between Reserving Unused Pins via Device Settings and Pin Planner
My device settings are such that all unused pins are reserved as "input tri-stated with weak pull-up." With these settings, what's the difference between: A ) assigning a pin with Pin Planner and...
View ArticleIs it possible to generate programming file (.sof) in Quartus II web package?
Hello, I already working with Quartus II subscription package, just I want to know is it possible to generate programming file (.sof) with Quartus II web edition, I seen comparison between Quartus II...
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Quartus 13, programmer, Ubuntu, JTAG programming failure
Hello, I have two machines, one with Windows 7 Professional 64-bit and second with Ubuntu 12.04 LTS, 32-bit. I installed Quartus 13 on both of them, but the one with Ubuntu is problematic. Creating and...
View ArticleQuartus Programmer 209066 Error
Hi All, I am having trouble programming a flash device attached to an Altera EP4SGX180. The flash device is EPCS128. The chain contains 3 devices in total. 2 of these are unknown so I have named/set...
View ArticleMAX7000 Power Supply Problem
I'm using Max7000 cpld. Sometimes MAX7000 doesn't work. No signals out. This happens when it passed some time in state of being off. Other CPLDs and FPGAs work well on same condition. Are there any...
View Articlenot able to ping fragmented data
hi, In our project we are using one device with Triple Speed Ethernet IP (10/100/1000 ethernet MAC with 1000base-x/SGMII PCS) at the source side and using another device with Triple Seed Ethernet IP at...
View ArticleSTRATIX IV EP4SE530H40 has the lead time push out from 8 weeks to 22 weeks,...
EP4SE530H40 has the lead time push out from 8 weeks to 22 weeks, what's the reason?
View ArticleSteps to embed NIOS Code into .pof file
Hi, I am using a Cyclone IV E FPGA and using active serial to configure my device. I am using Quartus v 13.0 SP1, with NIOS II and QSYS. I can comunicate with the board and program it with Quartus, but...
View ArticleASSERT statement using & operator
Hi, Please consider the following code: Code: library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; use work.my_package.all; entity my_mux is generic(N: integer := 8); port(x: in...
View ArticleAuto FPGA Program
Hi there, Is there a way to auto program FPGA when power ON without programming again. I mean Can I save the program in SDcard and load when I switch on the power so that it will never loose the...
View ArticleWhere is the Equations view in the Chip Planner of Quartus II 13?
Hello, well the title says it all already... this is part of the few things I cannot find from transitioning to Quartus 13. The Equations view on the Chip Planner was a very useful and concise tool and...
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