analysis and elaboration error
Dear all, I am having the following error message every time trying analysis and elaborate my design on Quartus II software. Error (12006): Node instance ''\channel_GN_0: inst_channel_GN_0''...
View ArticleHow to turn off the optimization that removes repeated logic?
Hi, I'm creating a small program using a block diagram. I want a propagation delay on a certain signal, so i've put in 2 not gates for this propagation delay. How do i disable the optimization in...
View ArticleThe wait function
Hello, I was wondering, can I use the wait function in Verilog? It seems like it simply doesn't work My syntax is wait (event) begin ... end Thanks a lot
View ArticleHelp with FFT mode
Hi guys, in my current setting i'm using a streaming mode FFT but thats just because it was the default setting. Another mode can help me get rid of serieus M4K-block issues. The system I have setup is...
View ArticleError compiling Mega Wizard block!
Hello, I am new to Quartus... I am using Quartus II version 8.1 Build 163 10 /28/2008 SJ Web edition! I created a new LPM SHIFTREG block and when I went to compile it it, I got the following error???...
View ArticleFor Modular SGDMA's Write Master:"Stride addressing enable" is for READ MASTER?
Our case's aim is to grabber video data to out TI's SOC by PCIe. So,I want to use Modular SGDMA. But when I read that spec <Modular_SGDMA_Write_Master_Core_UG.pdf>, I found following descriptions...
View ArticleHelp with NIOS2 I2C interface
Hi all, as part of my final project in my electronic engineering studys, i am supposed to have a NIOS2 with multymaster, multyslave I2C components. On the SPOC i saw there is no such interface. Does...
View ArticleHelp with NIOS2 I2C interface
Hi all, as part of my finalproject in my electronic engineering studys, i am supposed to have a NIOS2with multymaster, multyslave I2C components. On the SPOC i sawthere is no such interface. Does...
View ArticleHelp with my NIOS2 i2C interface
Hi all, as part of my finalproject in my electronic engineering studys, i am supposed to have a NIOS2with multymaster, multyslave I2C components. On the SPOC i sawthere is no such interface. Does...
View ArticleReducing LE usage when using DSP builder's advanced blockset
Hello! Are there some techniques to reduce logic element usage when developing some projects with DSP builder? I know something about folding without time-multiplexing, but just a little. Do system...
View ArticleRead Vertical Synchronization
Hello, can somebody say me, if it is possible to read the vertical synchronization signal with Nios II? I have some videosignals and each of the signals has his own Framebuffer. Now I want to delay the...
View ArticleCyclone V PLL desired output frequency
Hi! I have a problem using Altera PLL V 12.1 megafunction for Cyclone V. I choosed integer type of PLL and typed 20 MHz for Reference Clock Frequency. After that I choosed two output clock, outclk0 and...
View ArticleAltera Monitor Program Compile Error
Alright, before I start with my problem, here's every bit of information needed about the setup I'm working with: I'm using the Cyclone II FPGA Starter Development Board (Cyclone II EP2C20F484C7N...
View Articlesome other question for Modular SGDMA.
When I want to use Modular SGDMA,I encounter some questions for Modular SGDMA. 1>Stride Width: Value 0 means fixed address access,But in GUI,there is no "0" option.From the source file,it seems that...
View Articlesopc won't start, quartus ii 12.1, ubuntu 12.04
Hi I have quartus ii 12.1 web edition and ubuntu 12.04. When I click the Tools->Sopc Builder I get the splash screen briefly but then nothing, it doesn't start. Same thing when I try it from the...
View ArticleBasic Nios-II For Altera DE2_115 Board
Dear Friend , does any buddy have basic nios-II processor for Altera DE2_115 Board. the one which come along with CD is having all interface like AUDIO/I2C/ETHERNET2 etc. interfaces whereas i just...
View ArticleUART basic help needed
Hi guys, I have implemented my second UART into a NIOS II core, the first one i assign as the STD in and out in the BSP editor (no probs there!), and I am using this one I communicate to my PC using...
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Help, search footprint for PLD ACEX EP1K100FC484-1
Hi, On a PCBA we have a PLD ACEX EP1K100FC484-1 . The footprint on the gerber file of the board show a depopulated "cross area ball" see attached file "PCBA footprint.jpg". But on the datasheet the...
View ArticleQuartus 12.0 programmer stops at 63%
Hi, I'm currently using Quartus 12 Web 32bits edition on a 64bits-Windows and i'm aving troubles with the programmer. I build the sof file without problem. Somehow, when I program it to the board, the...
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