writing an array to text file
i have an array consisting of values in sfixed format (9 downto -6) with 100 values . i want to transfer it to a text file. can anyone please help ??
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Cyclone V SoC, DE1-SoC Board. Ethernet and USB don't work with custom kernel
Hi, I'm trying to build a custom Linux system on a DE1-SoC board by Terasic. The stock Linux works fine. Even with my own preloader and U-boot. Currently I'm trying to build a custom Kernel. I need...
View ArticleOpenCL SDK with time-limited Megafunction
Hello everyone. Does OpenCL SDK allow to use time-limited evaluation version of Megafunctions? Because I have an odd problem. I am using time-limited evaluation version of Triple-Speed-Ethernet...
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Megafunction plugin missing
HI, i need help. i'm using Quartus II V9.0 and when i want to select megafunction the plug-in are missing. What should i do to solve this issue. attached is the picture. Attached Images Missing...
View ArticleError (12002): Port "iCursor_RGB_EN" does not exist in macrofunction "u1"
Hi guys! Please help me. I encountered this error while compiling. What should I do to solve this? I am trying to create a Sobel Edge Detection in DE1 Board. Here is the part of the code which has the...
View Articleline follower using nios ii assembly
hii everyone, i need a quick help please :( please please i'am designing a line follower robot using fpga de2 board and nios ii assembly, can you help me giving me any help about the algorithm and how...
View ArticleLibrary auk_dspip_lib not found
I use a FIR II IP Core to simulate a lowpass filter with two input channels in Modelsim SE 10.1a. The decimation factor of the filter is 2. I generate a project about filter in Quartus II 12.0 and then...
View Articlesimple pin to pin delay managing in Cyclone
Hi everybody, I want to know just a simple thing. I'm going to use my FPGA as a bypass element for a bus. Imagine, I have a couple of inputs "INPUT_1" and "INPUT_2", and I'm going to redirect to...
View ArticlePerformance counter report
Hey I am running performance counter on my C code My problem is that the report only show the result for section 1 !! (even if I change sections order it only show the first) It should show 4 sections...
View ArticleNios2 console output
Hello Everyone, I am implementing edge detection using nios2. As an input , I have store my images as 128*128 array. I have implemented sobel filter and as an output, I am expecting pixel values which...
View ArticleNIOS II on DE2-115, can't download ELF
I'm new to the FPGA world and new to the NIOS II soft-processor. I've inherited a functioning project at work that implements the NIOS II and some C code on a DE2-115 board. I've got the directory...
View ArticleStratix iv GT General Purpose I/O's
I'm working on two projects, one with the DE0-Nano and Stratix iv GT boards. My project is to make a duobinary signal with the two boards. I was able to do so with the DE-Nano fairly easily, but I'm...
View ArticleIssues with Help content not displaying on left window pane
New to this, so here is the issue I am experiencing: -clicked on "search" option in the "Help" drop down menu on the Quartus II program -on the Left window pane with the "Search" , "Contents", "Index",...
View ArticleNet "VGA_B[0]", which fans out to "VGA_B[0]", cannot be assigned more than...
Hi guys. What do you mean by the error? Error (12014): Net "VGA_B[0]", which fans out to "VGA_B[0]", cannot be assigned more than one value Error (12015): Net is fed by "GND" Error (12015): Net is fed...
View ArticleHow to rum QCMD from cmd window for different quartus version
hii all, i have three version of quartus installed with me , quartus 9 quartus 11.1 and quartus 12.1. this is because some old projects are done on these version and time to time bug fixatures require...
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Problem with JTAG MAX 10
Is there anyone who is facing the same problem i am facing in MAX 10 JTAG? (see attachment). If anyone has any idea to solve this please let me know. I tried all sorts of way which has been shared in...
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NMOS switch code
Hi, I'm being a total noob here and a dunce but I'll ask anyway. :) How come the vhdl code attached does not simulate properly. The syntax is correct and it compiles but the signal does not output on...
View ArticleSDC problem
hi, My requriement is that: There are two input signal, In_a, In_b, these two signals will be connected to clock and data (llike I2C). two output signal, Out_clock, Out_data. Because the In_a could...
View ArticleQuestion on input delay
Hello; Why should I insert the input_delay constrains in my design? Thanks.
View ArticleRead/Write image file in Nios II
Hi Everyone, I want to load an image file (.bmp) using the Nios II but I can not! I used the fopen command and managed to load the image, but when I try to write in another file something happens that...
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