NiosII printf() not printing correctly
Hi all, I have a problem with the printf() commands not printing. If I un-tick the "small C library" option in the HAL, I don't receive any output to the NiosII console, but the program is working...
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hold slack violation
hi, i am using a clock period of 20ns(50Mhz) , in timing analysis constraints i set input delay max=10ns,min =5ns for input port, and set output delay max=5ns,min =2ns for output port. in verifying the...
View Articleppm detection for sdi receiver
Hi all I have problem in changing reference clock (148.5MHz <-> 148.35MHz) for SDI receiver. In the SDI user manual, there's a paragraph related to my problem. "You must supply two receive...
View ArticleMaximum PCB trace length for transceiver of Arria V GZ to SFP/QSFP connector...
Dear All Do you know how far the maximum trace length from transceiver of Arria V Gz to SFP+/QSFP? Regards, Nhutpp
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ROM contents confusion
Hai, I have vhdl code for store a constant in ROM. The ROM is divided into odd and even; ROMO and ROME as shown below: Code: library IEEE;Â Â use IEEE.STD_LOGIC_1164.all;Â --Â use...
View ArticlePlease send me in the correct direction.
I have a 4 bit vector as an input, i must split this into two 2 bit vectors (symbols) .For each symbol I need to send to the output the 8 values which are stored in arrays. I am new to VHDL so any...
View ArticleALTLVDS_RX doesn't compile
Hi, I'm trying to implement the ALTLVDS_RX IP using an external PLL and I get the following error if I enable the option "Use 'rx_data_reset' input port": Error (287102): Input pin "rx_data_reset"...
View ArticleDotted line in ModelSim
hi, does anyone know what is the meaning of dotted lines in ModelSim? i got it while i was running simulation on I2C code. thanks.
View ArticleAltera_UP_Clocks IP core
Hi all, i am beginner in coding RTL. I want to use the Altera_UP_Clocks component in order to use SDRAM on my DE2-115 board. In the component library i can not find Altera University program category....
View Articlearrays
Hello, 1) How do I initialize an array? When I used the following: ARCHITECTURE test OF Testing IS TYPE arr IS ARRAY (N DOWNTO 0) OF STD_LOGIC_VECTOR (N DOWNTO 0); SIGNAL rr :arr := (OTHERS =>...
View Articleset size of binary number?
Hello, How can the size of a binary number be set, or extended by zeros; i.e. equivalent of Verilog's <size>'b<value>. So in Verilog 5'b110 will give 00110b. I require the size to be...
View ArticleSetting Tco and Tsu constraints, DE0-nano
Hi All, As part of the process of attaching University Program -> Memory -> SD Card Interface SOPC IP module to a NIOS processor I noted " it is important to set Tco and Tsu constraints for the...
View ArticleSetting Tco and Tsu constraints, DE0-nano, SD card module
Hi All, As part of the process of attaching University Program -> Memory -> SD Card Interface SOPC IP module to a NIOS processor I noted " it is important to set Tco and Tsu constraints for the...
View Articleproblem with NIOS II
Hi, I started to use NIOS II IDE trying to make rthernet communication between a pc and DE2 board.i started by trying some examples existing in the NIOS II system but while runnig i got the following...
View Article16 bit one hot vector to 5 bit vector
Hi, I need to encode a 16 bit one hot vector to a 5 bit value (i.e every bit set in my 16 bit one hot vector represents a unique 5 bit value). I remember using state machines to do it the other way (5...
View ArticleNios II Assembler Editor
Hi guys I'm gonna state my problem very shortly, the thing is that i'm really not a C/C++ language fan when it comes to programming, i spent my whole life writing assembly codes for a varity of...
View ArticleGXB_GND connection for Cyclone IV GX
Hi, I am using Cyclone IV GX FPGA. I am making use of the PCIe hard IP. I want to know how the GXB_GND pins need to be connected. Can I connect it directly to GND. The pin file shows that unused GXB...
View ArticleELF file not generated
we designed a nios2 system in sopc builder and used nios 2 ide for application program. there is no error in the program but .elf file is not generated. Help us to solve it.
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how can i check the chip i bought is fake or not
hi all: I bought some fpga chips (ep3c16) on the web. but they are different with chips that i used.so i want to check the chips is fake or not.002.JPG up:new;down:used Attached Images 002.JPG (30.6 KB)
View ArticleNIOS II IDE Debugging with mixed devices in JTAG chain
Hi, I have a Cyclone IV and a TI ARM Processor connected to a single JTAG chain (looped). I can successfully program the Cyclone IV EPCS device via the JTAG chain and the Quartus programmer by adding...
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