Arria 10 SPI Master bits per word support
Hi All, We are using Arria 10 SOC FPGA and interfacing SPI slave device which needs 20-bit stream of data as input. Here we have few questions on Arria 10 SPI controller. 1. What is the minimum and...
View Articlean431
Hi all, AN431 reference design provides the qsys version of the pcie to external memory and the driver is not compatible with windows 7. Is there any reference design available with the non-qsys...
View ArticleEthernet connection between DE0_NANO_SOC board and PC
Hi, Terasic documents recommand to use ethernet router for connecting Ethernet connection between DE0_NANO_SOC board and PC. can i have a direct connection without ethernet router? best regards
View ArticleProblem while launching ModelSim simulation from Quartus
Hello, I'm newbie in Quartus and am starting to learn Quartus design flow. Certain documents I've found on the web, mention that one can run ModelSim simulation from Quartus. Unfortunately it didn't...
View ArticleModelsim-Altera Not Starting, No Error Message
Hi everybody, I just installed Quartus II v13.0 Web Edition and wanted to simulate a code and found out that the Modelsim-Altera is not responding to click. It is not bringing up any error message but...
View ArticleError pre-loading RAM on MAX10
I'm trying to pre-load a 2-port RAM IP on a MAX10 10M08SAE144C8GES. It should support pre-loading since it is an SA version. When I get to assembling I get this error in Quartus Prime: Error (14703):...
View ArticleWhat is the latest Quartus version which still brings SOPC
Sorry, but I couldn´t find such information. So, could you guys tell me what is what is the latest Quartus version which still brings SOPC Builder?
View Articleget unconstrained pathes with quartus_sta shell script / qsta_experiment.tcl
Hello! I would like to report unconstrained pathes within an automated tcl script. quartus_sta commands like "report_ucp" and "check_timing" do their reporting only to the Panel, stdout, or to a file....
View ArticleIssues with Max10 development kit
Hi, I'm using MAX10 FPGA development kit with 10M50D F484 package FPGA. But I'm having some problems regarding using the push buttons present in the board. As per the data sheet the push button has to...
View ArticleWhat's the Altera Equivalent to the Xilinx STARTUP Primitive GSR/GlobalSetReset?
What's the Altera Equivalent to the Xilinx STARTUP Primitive GSR/GlobalSetReset? Here's an example of what it looks like for Xilinx: // Instantiating STARTUP symbol STARTUP U1 (.GSR(global_reset));...
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MAX10 ADC sample store with threshold violation detection core
Hi, I succesfully followed this example http://www.alterawiki.com/uploads/c/...tection_v1.pdf. Now trying to do something "usefull": to turn on a LED when out of thesholds. I wrote a controller with...
View ArticleReset windows in Quartus 16.0
I accidently moved the compilation report window (I think I clicked on the 'pushpin' button) and now it shows up like every other document. I tried to dock it at the bottom of the screen with no luck,...
View ArticleAltera Max10 FPGA (10M02SCU169C8G) and internal oscillator. How to use it?
Hi, I'm new to FPGA and I'm trying to use the Max 10 FPGA in a project and I'm trying to find a simple solution to use the internal oscillator that is available in MAX 10 device. My setup is Altera...
View ArticleFacing issue while trying to generate sim_examples : Command not found...
Hi, I have downloaded Quartus Prime Standard Edition 30-days trail version. I am trying to go through the simulation examples listed in the path: C:\altera\16.0\ip\altera\altera_dp\sim_example\av Tried...
View ArticleEnumeration of I/O banks with I/O type, voltage, pin function for...
Hello, Request help on getting the details around I/O banks, I/O type, I/O voltage, pin function for 10AS016E4F29I3SG. Suresh kumar
View ArticleEQFP pin spacing 0.4mm or 0.5mm?
I am a very newbie to Altera devices. Now, I'm checking the package dimension of 5M40ZE64C5N which is EQFP 64pin device. There are two different descriptions about pin spacing and I'm confusing. The...
View ArticleDisplay Mif / Hex file in dual port ram on Nios II stdout
I'm trying to fill a dual port ram (framebuffer) with a Mif File and then print it out with NIOS II and its C-Code programming. The Mif File (converted to Hex) and loaded into the dual port ram looks...
View ArticleAdding 2 32-bit numbers and storing the result in a 33 bit register
Hello, I need to add two 32-bit unsigned numbers and need to store in a 33 bit register in VHDL. Is it possible to do so. If so, then please help me to do so. Thanks in advance
View ArticleH264 software decoder
Hi, I'm trying to find an H.264 software decoder to run on the ARM inside a Cyclone V, and am struggling to get one running fast enough at 1280x720p or 1920x1080i. Does anyone know of a suitable...
View ArticleHow does one overcome limitation of altera clock control block inputs?
The altera clock control block allows one to switch between 2 PLL clocks. These clock control hard IP blocks are fixed to specific PLLs. Is it bad idea to use normal logic multiplexer only because of...
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